Role Overview
This is a senior-level technical role within the semiconductor industry, focusing on Register-Transfer Level (RTL) integration. The position involves merging various functional blocks (IPs) into a larger System-on-Chip (SoC) design.
Experience & Skills
Experience Level: 6+ Years (Senior/Lead Level).
Technical Domains: * Hardware Description Languages: Verilog and SystemVerilog.
Architecture: CPU, BUS, Peripheral, and Subsystem integration.
Design Types: ASIC designs and SoC (System on Chip).
Protocols: ARM, AMBA, AXI, AHB, APB.
Core Competencies: Digital Design, RTL Design, IP Integration, and VLSI (Very Large Scale Integration).
Application Instructions
Primary Action: Send updated resumes via email.
Recipient: Annam Hemalatha
To apply for this job email your details to Hemalatha.A@skalensemi.com
